Publications
- 10.1007/978-3-031-47705-8. (Eds.): . 18th International Conference on integrated Formal Methods, {iFM} 2023. Heidelberg: Springer. doi:
- . . ‘Deductive Verification of Parameterized Embedded Systems Modeled in {SystemC}.’ In Verification, Model Checking, and Abstract Interpretation - 25th International Conference, {VMCAI} 2024, edited by , 187–209. Heidelberg: Springer. doi: 10.1007/978-3-031-50521-8\_9.
- . . ‘Reusable formal models for concurrency and communication in custom real-time operating systems.’ International Journal on Software Tools for Technology Transfer 26, № 2: 229–245. doi: 10.1007/S10009-024-00743-4.
- 10.1007/978-3-031-44412-8_1. (Eds.): . Ernst Denert Software Engineering Award 2022. Berlin: Springer Nature. doi:
- 10.1007/978-3-031-46002-9_6. . ‘Shielded Learning for Resilience and Performance Based on Statistical Model Checking in Simulink.’ In Bridging the Gap Between AI and Reality - First International Conference, AISoLA 2023, Crete, Greece, October 23–28, 2023, Proceedings, edited by , 94–118. Heidelberg: Springer. doi:
- . . ‘A Coverage-Driven Systematic Test Approach for Simultaneous Localization and Mapping.’ In IEEE Conference on Software Testing, Verification and Validation (ICST), edited by , 25–36. New York City: Wiley-IEEE Press. doi: 10.1109/ICST57152.2023.00012.
- . . ‘Formal Verification of Intelligent Hybrid Systems that are modeled with Simulink and the Reinforcement Learning Toolbox.’ In Software Engineering, edited by , 29–30. Bonn: Gesellschaft für Informatik.
- . . ‘Safe Integration of Learning in SystemC using Timed Contracts and Model Checking.’ In 21st ACM-IEEE International Symposium on Formal Methods and Models for System Design, MEMOCODE 2023, edited by , 12–22. New York City: Wiley-IEEE Computer Society Press. doi: 10.1145/3610579.3611078.
- . . ‘Reusable Contracts for Safe Integration of Reinforcement Learning in Hybrid Systems.’ In Automated Technology for Verification and Analysis - 20th International Symposium (ATVA), edited by , 58–74. Heidelberg: Springer. doi: 10.1007/978-3-031-19992-9\_4.
- . . ‘Towards Reusable Formal Models for Custom Real-Time Operating Systems.’ In Formal Methods for Industrial Critical Systems - 27th International Conference, {FMICS} 2022, Warsaw, Poland, September 14-15, 2022, Proceedings, edited by , 69–85. Heidelberg: Springer. doi: 10.1007/978-3-031-15008-1\_6.
- . . ‘SpecifyThis - Bridging Gaps Between Program Specification Paradigms.’ In Leveraging Applications of Formal Methods, Verification and Validation. Verification Principles - 11th International Symposium, ISoLA 2022, Rhodes, Greece, October 22-30, 2022, Proceedings, Part I, edited by , 3–6. Heidelberg: Springer. doi: 10.1007/978-3-031-19849-6\_1.
- . . ‘Towards Safe and Resilient Hybrid Systems in the Presence of Learning and Uncertainty.’ In Leveraging Applications of Formal Methods, Verification and Validation. Verification Principles - 11th International Symposium, ISoLA 2022, Rhodes, Greece, October 22-30, 2022, Proceedings, Part I, edited by , 299–319. Heidelberg: Springer. doi: 10.1007/978-3-031-19849-6_18.
- . . ‘Simulation of Timing Attacks and Challenges for Early Side-Channel Security Analysis.’ In Designing Modern Embedded Systems: Software, Hardware, and Applications: 7th IFIP TC 10 International Embedded Systems Symposium, IESS 2022, Lippstadt, Germany, November 3–4, 2022, Proceedings, edited by , 16–27. Heidelberg: Springer. doi: 10.1007/978-3-031-34214-1_2.
- . . ‘Formal Verification of Intelligent Cyber-Physical Systems with the Interactive Theorem Prover KeYmaera X.’ In Proceedings of the Software Engineering 2021 Satellite Events, Braunschweig/Virtual, Germany, February 22 - 26, 2021, edited by , 1–4. Aachen: CEUR-WS.
- . . ‘Service-oriented decomposition and verification of hybrid system models using feature models and contracts.’ Science of Computer Programming 211: 102694. doi: 10.1016/j.scico.2021.102694.
- . . ‘Formal Verification of Intelligent Hybrid Systems that are Modeled with Simulink and the Reinforcement Learning Toolbox.’ In Formal Methods, edited by , 349–366. Basel : Springer International Publishing. doi: 10.1007/978-3-030-90870-6_19.
- . . ‘Combining Forces: How to Formally Verify Informally Defined Embedded Systems.’ In Formal Methods, edited by , 3–22. Basel : Springer International Publishing. doi: 10.1007/978-3-030-90870-6_1.
- . . ‘Towards Profile-Guided Optimisation for Safe and Efficient Parallel Stream Processing in Rust.’ Contributed to the Workshop on Applications for Multi-Core Architectures (WAMCA) at IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), Virtual Conference.
- . . ‘Automated Verification of Embedded Control Software - Track Introduction.’ In 9th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA 2020). Heidelberg: Springer.
- . . ‘Towards Automated Service-oriented Verification of Embedded Control Software modeled in Simulink.’ In International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA 2020). Heidelberg: Springer.
- . . ‘Optimized Hardware/Software Co-Verification using the UCLID Satisfiability Modulo Theory Solver.’ Contributed to the IEEE International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises (WETICE 2020), Virtual Conference.
- . . ‘Early Analysis of Security Threats by Modeling and Simulating Power Attacks in SystemC.’ In 91st IEEE Vehicular Technology Conference (VTC Spring 2020), Antwerp, Belgium, May 25-28, 2020, 1–5. New York City: Wiley-IEEE Press. doi: 10.1109/VTC2020-Spring48590.2020.9129426.
- . . ‘A Genetic Algorithm for Automated Test Generation for Satellite On-board Image Processing Applications.’ In Proceedings of the 15th International Conference on Software Technologies (ICSOFT), Lieusaint, Paris, France, July 7-9, 2020, edited by , 128–135. Setúbal: SciTePress. doi: 10.5220/0009821101280135.
- . . ‘Equivalence Class Definition for Automated Testing of Satellite On-Board Image Processing.’ In Software Technologies, edited by , 3–25. Heidelberg: Springer. doi: 10.1007/978-3-030-52991-8\_1.
- . . ‘Dependence Analysis and Automated Partitioning for Scalable Formal Analysis of SystemC Designs.’ In ACM/IEEE International Conference on Formal Methods and Models for System Design, (MEMOCODE 2020), 1–6. New York City: Wiley-IEEE Press. doi: 10.1109/MEMOCODE51338.2020.9314998.
- . . ‘A Service-oriented Approach for Decomposing and Verifying Hybrid System Models.’ Contributed to the International Conference on Formal Aspects of Component Software, Amsterdam, Niederlande. doi: 10.1007/978-3-030-40914-2\_7.
- . . ‘A Rating Tool for the Automated Selection of Software Refactorings that Remove Antipatterns to Improve Performance and Stability.’ In Software Technologies, edited by , 28–54.
- . . ‘Test Input Partitioning for Automated Testing of Satellite On-board Image Processing Algorithms.’ Contributed to the International Conference on Software Technologies (ICSOFT 2019), Prague, Czech Republic.
- . . ‘Information Flow Analysis of Combined Simulink/Stateflow Models.’ Information Technology and Control 48, № 2: 299–315. doi: 10.5755/j01.itc.48.2.21759.
- . . ‘A Qualitative Evaluation of IPv6 for the Industrial Internet of Things.’ International Workshop on the Future of the Internet of Things (FIT 2018) 138. doi: 10.1016/j.procs.2018.07.195.
- . . ‘Automated Selection of Software Refactorings that Improve Performance.’ In 13th International Conference on Software Technologies (ICSOFT'18), 67–78. Setúbal: SciTePress.
- . . ‘Deductive Verification of Hybrid Control Systems modeled in Simulink with KeYmaera X.’ In International Conference on Formal Engineering Methods (ICFEM 2018, to appear). Heidelberg: Springer. doi: 10.1007/978-3-030-02450-5_6.
- . . ‘Efficient and Safe Control Flow Recovery Using a Restricted Intermediate Language.’ In Proceedings - 2018 IEEE 27th International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises (WETICE 2018), Paris, France, 27-29 June 2018, 235–240. New York City: Wiley-IEEE Computer Society Press. doi: 10.1109/WETICE.2018.00052.
- . . ‘Information Flow Analysis of Combined Simulink/Stateflow Models.’ In VSC Track on Validation of Safety critical Collaboration systems at the IEEE International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises (WETICE 2018), 223–228. New York City: Wiley-IEEE Computer Society Press. doi: 10.1109/WETICE.2018.00050.
- . . ‘Equivalence Checking for Hybrid Control Systems Modelled in Simulink.’ In 2018 IEEE International Conference on Software Quality, Reliability and Security Companion (QRS-C), 572–579. New York City: Wiley-IEEE Press. doi: 10.1109/QRS-C.2018.00101.
- . . ‘A Safe and User-Friendly Graphical Programming Model for Parallel Stream Processing.’ In Parallel, Distributed and Network-based Processing (PDP), 2018 26th Euromicro International Conference on, 239–243. New York City: Wiley-IEEE Computer Society Press. doi: 10.1109/PDP2018.2018.00040.
- . . ‘Timed Path Conditions in MATLAB/Simulink.’ In System Level Design from HW/SW to Memory for Embedded Systems. Springer., 64–76. Heidelberg: Springer.
- . . ‘Bit-Precise Formal Verification for SystemC Using Satisfiability Modulo Theories Solving.’ In System Level Design from HW/SW to Memory for Embedded Systems, 51–63. Heidelberg: Springer.
- . . ‘Securing Real-Time Cyber-Physical Systems Using WCET-Aware Artificial Diversity.’ In Dependable, Autonomic and Secure Computing, 15th Intl Conf on Pervasive Intelligence & Computing, 3rd Intl Conf on Big Data Intelligence and Computing and Cyber Science and Technology Congress (DASC/PiCom/DataCom/CyberSciTech), 2017 IEEE 15th Intl, 454–461. New York City: Wiley-IEEE Press. doi: 10.1109/DASC-PICom-DataCom-CyberSciTec.2017.88.
- . . ‘Towards Service-Oriented Design of Hybrid Systems Modeled in Simulink.’ In Computer Software and Applications Conference (COMPSAC), 2017 IEEE 41st Annual, 469–474. New York City: Wiley-IEEE Press. doi: 10.1109/COMPSAC.2017.251.
- . . ‘Automatic Analysis and Abstraction for Model Checking HW/SW Co-Designs modeled in SystemC.’ ACM SIGAda Ada Letters 36, № 2: 9–17. doi: 10.1145/3092893.3092895.
- . . ‘Proving Correctness of Refactorings for Hybrid Simulink Models with Control Flow.’ In International Workshop on Design, Modeling, and Evaluation of Cyber Physical Systems, 71–86. Heidelberg: Springer.
- . . ‘Proving Transformation Correctness of Refactorings for Discrete and Continuous Simulink Models.’ In ICONS 2016, The Eleventh International Conference on Systems, EMBEDDED 2016, International Symposium on Advances in Embedded Systems and Applications., 45–50.
- . . ‘A Multi-Robot Search Using LEGO Mindstorms -- An Embedded Software Design Project.’ ACM SIGBED Review, Special Issue on Embedded and Cyber-Physical Systems Education 14, № 1.
- . . ‘Protecting Legacy Code against Control Hijacking via Execution Location Equivalence Checking.’ In Software Quality, Reliability and Security (QRS), 2016 IEEE International Conference on, 230–241. doi: 10.1109/QRS.2016.35.
- . . ‘Towards Identifying Spurious Paths in Combined Simulink/Stateflow Models.’ Contributed to the Informatik 2016, Klagenfurt, Austria.
- . . ‘Towards the verification of refactorings of hybrid Simulink models.’ In Proceedings of 3rd International Workshop on Verification and Program Transformation, EPTCS, 69.
- . . ‘Verification of Embedded Real-time Systems.’ In Formal Modeling and Verification of Cyber-Physical Systems, edited by , 1–25. Wiesbaden: Springer Vieweg. doi: 10.1007/978-3-658-09994-7_1.
- . . ‘STATE--A SystemC to Timed Automata Transformation Engine.’ In High Performance Computing and Communications (HPCC), 2015 IEEE 7th International Symposium on Cyberspace Safety and Security (CSS), 2015 IEEE 12th International Conferen on Embedded Software and Systems (ICESS), 2015 IEEE 17th International Conference on, 1074–1077. doi: 10.1109/HPCC-CSS-ICESS.2015.188.
- . . ‘The RESCUE Approach-Towards Compositional Hardware/Software Co-verification.’ In High Performance Computing and Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety and Security, 2014 IEEE 11th Intl Conf on Embedded Software and Syst (HPCC, CSS, ICESS), 2014 IEEE Intl Conf on, 721–724. doi: 10.1109/HPCC.2014.109.
- . . ‘Formal Verification of SystemC Designs using the BLAST Software Model Checker.’ In ACESMB@ MoDELS, 44–53.
- . . ‘Reverse engineering of ARM binaries using formal transformations.’ In Proceedings of the 7th International Conference on Security of Information and Networks, 345. doi: 10.1145/2659651.2659697.
- . . ‘Model checking memory-related properties of hardware/software co-designs.’ In International Embedded Systems Symposium, 92–103. doi: 10.1007/978-3-642-38853-8_9.
- . . ‘Bit-precise formal verification of discrete-time MATLAB/Simulink models using SMT solving.’ In Embedded Software (EMSOFT), 2013 Proceedings of the International Conference on, 1–10. doi: 10.1109/EMSOFT.2013.6658586.
- . . ‘A HW/SW co-verification framework for SystemC.’ ACM Transactions on Embedded Computing Systems (TECS) 12, № 1s: 61. doi: 10.1145/2435227.2435257.
- . . ‘Optimized Transformation and Verification of SystemC Methods.’ Electronic Communications of the EASST 53.
- . . ‘Automated HW/SW Co-Verification of SystemC Designs using Timed Automata.’ it-Information Technology Methoden und innovative Anwendungen der Informatik und Informationstechnik 54, № 6: 296–300.
- . . „Automatisierte HW/SW Co-Verifikation von SystemC Modellen mit Hilfe von Timed Automata.“ it - Information Technology. Ausgezeichnete Informatikdissertationen 54, № 6: 296–300.
- . . ‘Towards a Formal Semantics of the SystemC-TLM Core Interfaces.’ In GI/GMM/ITG Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TUZ).
- . . ‘Model checking a SystemC/TLM design of the AMBA AHB protocol.’ In Embedded Systems for Real-Time Multimedia (ESTIMedia), 2011 9th IEEE Symposium on, 66–75. doi: 10.1109/ESTIMedia.2011.6088527.
- . . ‘An evolutionary algorithm for the generation of timed test traces for embedded real-time systems.’ In Software Testing, Verification and Validation (ICST), 2011 IEEE Fourth International Conference on, 170–179.
- . . ‘Transforming SystemC transaction level models into UPPAAL timed automata.’ In Proceedings of the Ninth ACM/IEEE International Conference on Formal Methods and Models for Codesign, 161–170. doi: 10.1109/MEMCOD.2011.5970523.
- . . A Framework for Automated HW/SW Co-Verification of SystemC Designs using Timed Automata. Berlin: Logos Verlag.
- . . ‘Automated conformance evaluation of SystemC designs using timed automata.’ In Test Symposium (ETS), 2010 15th IEEE European, 188–193. doi: 10.1109/ETSYM.2010.5512761.
- . . ‘Combining model checking and testing in a continuous hw/sw co-verification process.’ In International Conference on Tests and Proofs, 121–136. doi: 10.1007/978-3-642-02949-3_10.
- . . ‘Model checking SystemC designs using timed automata.’ In Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, 131–136. doi: 10.1145/1450135.1450166.